Tour of the latest DATV-Express PCBA

I have just posted a video tour of the new PCB Assembly on YouTube.
DATV-Express v2 PCBA The video is better quality this time.

Enjoy it.

Yet more, you guessed it express!

Yes another photo, this time of my HP spectrum analyser. What you are seeing is
a 2MS/s 32APSK 3/4 FEC DVB-S2 transmission with a 95 tap compensated root
raised cosine response will 0.35 rolloff. The filter takes the DVB-S2 symbols and
interpolates them by a factor of 8 to put the aliases outside the LC Nyquist filter
response.

Believe it or not 6 Mbits/s of video is crammed into that 2 MHz piece of spectrum

DATV-Express will operate at symbol rates below 2MS/s but the alias responses start
to creep in. That is what comes of having a fixed analogue filter. Still if people need
lower symbol rates a new FPGA file can be created with x16 interpolation. It has taken
me a few days to get this to work but I have also re-arranged the code to make it more
readable and easier to change in the future.

The blip on the left hand side at 1.24 GHz is probably a multiple of 20 MHz reference
clock signal, it remains stationary when I change the operating frequency.

I am now going to take a step back and think a bit more as to where I go next with the
FPGA code. I am modularising the code as much as possible so I can use the same
modules for different variants. They all have some parts that are common and those
are the bits I am concentrating on first.

More Express

Here is a plot of the DATV-Express output at 1.3 Ghz, within the performance of the
Rigol spectrum analyser it appears to meet the specifications on the data sheet. I am
only showing the close in response, outside this range (other than harmonics) there
is nothing to see. The board is transmitting a single carrier.

Currently I am increasing the amount of interpolation in the transmit filter, this is
required for the lower symbol rates. The aliases must be kept outside the analogue
filter passband, which for DATV-Express is 5 MHz.

I have also added a module to provide programmable symbol rates. The module
is controlled through the I2C bus. To do that I have had to implemented an I2C bus
slave inside the FPGA. There are other ways of doing it but it is simpler to use
the I2C bus for these type of low rate transfers.

Writing FPGA code is fun but very slow and a lot more complex than conventional
software programming. Timing is critical because of the parallel nature of FPGAs.
The whole of my design so far has been clock edge driven using non blocking
code. I am writing in Verilog mainly because many other Amateur projects use that
language. One day I might have a go at using VHDL or even schematic entry.

DATV-Express has landed

Just a quick note to let you all know that I now have the prototype
to play with.

It covers 72.5 MHz to 2.48 GHz with about 60 mW output.
The fractional PLL is considerably cleaner than the previous board,
which shows how critical grounding is!

I had it transmitting DVB-S and DVB-S2 today a couple of hours after
Parcelforce delivered the box. I am very happy with it so far.

I have a considerable amount of work to do on the FPGA code next,
mainly to make it as flexible as possible on symbol rates. I am sure we
will have something to show to people later in the year.

Art will soon start building another board, we currently have enough
parts to make 4 boards.

Voila, done!

Art WA8RMC has finished. Let's see how long the Postal service takes to deliver it to me.

Breaking news, using the test software Art has managed to get the PLL to lock at
1.3 GHz and the unit is producing 18.6 dbm. All the main ICs have now been verified as
working.

The boards have landed

I didn't get an exclusive this time but here is a partially completed DATV-Express Rev2 PCB. I am looking forward to getting the first completed unit to test software on. Exciting times!

ARM DATV

No picture today but I thought you might like to know that the tests that
Rob M0DTS has been doing using an MK808 have been quite successful.
The module that uses the most CPU cycles is the Reed Solomon encoder.
Luckily Brian G4EWJ has written an optimised version of this module
in ARM assembly language. His module uses about 1/4 of the processing
that my C module does. So we have managed to get the whole thing down
from 60% to about 20%. There are further improvements that can be made.

I may have a go at optimising my C code as it is nice to have something that
can be ported to other Linux platforms.

The bare DATV-Express boards have been fabricated and the last I heard is
that they are with the courier.

I am hoping that the DATV-Express project can become a collaborative one
at least as far as the software is concerned. It may not be possible for everyone
to hand solder SMD components these days but everyone can try to write some
software. For small projects like this it is not that difficult and we all have to
start somewhere.