Monday, 18 March 2013

More Express

Here is a plot of the DATV-Express output at 1.3 Ghz, within the performance of the
Rigol spectrum analyser it appears to meet the specifications on the data sheet. I am
only showing the close in response, outside this range (other than harmonics) there
is nothing to see. The board is transmitting a single carrier.

Currently I am increasing the amount of interpolation in the transmit filter, this is
required for the lower symbol rates. The aliases must be kept outside the analogue
filter passband, which for DATV-Express is 5 MHz.

I have also added a module to provide programmable symbol rates. The module
is controlled through the I2C bus. To do that I have had to implemented an I2C bus
slave inside the FPGA. There are other ways of doing it but it is simpler to use
the I2C bus for these type of low rate transfers.

Writing FPGA code is fun but very slow and a lot more complex than conventional
software programming. Timing is critical because of the parallel nature of FPGAs.
The whole of my design so far has been clock edge driven using non blocking
code. I am writing in Verilog mainly because many other Amateur projects use that
language. One day I might have a go at using VHDL or even schematic entry.

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