I recently bought a used Scientific Atlanta D9020 MPEG2 encoder for
peanuts on eBay it can be seen in the top photo. Of course it has a
270 Mbits/s DVB-ASI output. A challenge! So I am now making a DVB-ASI
to USB2 converter using mostly off the shelf parts.
The ASI decoding will be done using one of the little FPGA boards I wrote
about in my CQ-TV FPGA article. I have had to replace the stock 50 MHz
oscillator on the board with a 27 MHz one but apart from that it should be
fine. The USB2 part will use one of the FTDI development boards. I am
currently making a small interface board to connect the two together and
to provide the 75 ohm coax line interface.
I will keep you updated on this project as I am sure there will be other people
who want an inexpensive means to import Transport Streams over USB2
from DVB-ASI devices.
this "el-cheapo" ASI module would be really a pretty useful interface; are you going to use a cheap ASI receiver/equalizer IC or some lower level HW setup where everything is made in FPGA "software"?
ReplyDeleteare you planning an ASI OUT interface too? here a PCR restamping core would be pretty helpful.
I intended to do most of it in the FPGA. I looked at dedicated chips but all the ones I could find were quite expensive. Except on very long cable runs I am not too sure equalization will be necessary. I have had a look at line equalizers and they mainly seem to provide a high frequency boost. Although I have no need for ASI out I will attempt to provided it. I already have the 8/10 tables created for both decoding and encoding. As far as PCR re-stamping is concerned I had not thought about that.
Deleteyeah, doing it completely in FPGA will lower a lot the BOM! way to go..
ReplyDeleteit's just a matter to supersample A LOT (at least 3X?) the incoming stream, i suppose, to find a good amount of bits for each symbols.. something like the process to sync on UART RX
ASI OUT interface is going to be way simpler (less critical) in the final stage.
Yes 270 MHz is close to the maximum the FPGA can cope with. I am using the FPGA pll to produce 3 clocks 0 deg, 120 deg, 240 deg. to sample the waveform. I won't know until I get it all hooked up whether that is going to work, it should. The only difficult bit on transmit is sending the padding character K28.5 at the right time. It took me a while to figure out how the disparity actually works. One I can decode packets from the D9020 I can then test the transmit side by looping it back on itself. The FTDI is a dual channel device so I can do full Duplex.
ReplyDeleteas i happen to have a Papilio Pro, FPGA board with a SP6LX9, this interface is going to be a nice "wing" for it.
ReplyDeletea nice HW relay for ASI I/O shortcut as a failover design (in case of FPGA power off) would be the cherry top..
regarding the best clock to play with ASI, i suppose that i should swap its stock 32MHz OSC with a 27MHz part to be better suited with ASI clock. right?
Yes I had to replace the 50MHz clock to get something to multiply up to 270 MHz. A big soldering iron applied to the back of the oscillator for about 20 secs did the job. I am not familiar with that board. I will go and look it up.
ReplyDeleteI have a few Divicom encoders that I've done the same thing with. Also picked up a Tandberg SM 5600 DVB-S modulator that I mixed up to 23CM. They work great but, are space and power hogs. Has given me a real appreciation for latest designs.
ReplyDeleteIt seems a shame to see these things go to land fill. The D9020 is only 1U high so it fits nicely into my rack. The fans on it are a bit noisy but not as noisy as the 4U high Quad core PC I have in the rack. I am hoping the performance is going to be somewhat
ReplyDeletebetter than the Hauppauge encoder which is not really good enough for broadcasting purposes.
Definitely broadcast quality. As expected, it looks like I'm watching a satellite feed. Plug and play too, single ASI coax cable, a power cord and an HT rubber duck on the back panel. I managed all of the up- conversion and output amp inside the original Tandberg cabinet.
Deleteyou can buy CY7B933 on ebay (two for $12 free shipping), or just buy whole input card (~$35)
ReplyDeletehttp://www.auctiva.com/hostedimages/showimage.aspx?gid=1103842&image=420865149&images=420865149,420865248,420865357,420865453,420865724&formats=0,0,0,0,0&format=0
I wouldnt consider $12 a lot versus doing everything by hand uphill in the snow
Personally I prefer Cypress FX2 for dealing with USB ($10 free shipping ebay), its a lot faster than FTDI (easy 30MB/s read). You could probably skip FPGA and just couple CY7B933 with CY7C68013A (+ref clock) and read ASI stream directly.
Btw I found this piece of software that might interest you?
http://sourceforge.net/projects/crazyscan/
http://www.youtube.com/watch?v=we6y-aTebxQ
It seems to work with few <$100 DVB tuners and offers some nice functions (scan, constellations)
and
http://www.4t2.eu/4T2ContentAnalyser.html
combined use
http://www.youtube.com/watch?v=YD4VGsh5UVI
I had looked for those chips a while ago but couldn't find any (I obviously didn't look in the right place). There replacements are very expensive and overkill for this application.
DeleteAs far as the FX2 is concerned, we use that on DATV-Express. As you say it should be possible to use the Waveform mode of the chip to provide the required interfacing to the Cypress chip. I do have an FX2 evaluation board collecting dust. The trouble is I still need to find an ATV related FPGA project for the series of articles I am doing :)
My name is Eonassis Soares, speak of Brazil, I’m an Engineer with wide experience in installing and maintaining networks of satellites in DVB, work with various brands of equipment and products in the area, I know the theory of operation of the entire system, however the practice be limited to priority systems that work.
ReplyDeleteThrough the project Digiline-ZL Mark Atherton, New Zealand, came to Orange County, and then to your website.
I would like to develop a system with dvb-s2 DVB-RCS in return not for TV, more to transport IP over DVB, which would have only one central point and multi-remote addressing only the center point.
I would greatly appreciate your help to make the project possible?
I will be grateful .
send e-mail for me eonassis@msn.com