Saturday, 20 March 2010

Things are progressing slowly.

I have the Tonna 23 element Yagi put together.
I am waiting on the GH Engineering kit which should
be here before the end of the month.
The various table packets are starting to be recognised
by an MPEG2 analyser I downloaded.

Yesterday I started looking at DVB-T. I have spun
the numbers and it looks as if it will be possible to get
it to work on the USRP2 with a bit of fiddling.

In a mad rush I started to write the code for DVB-T.
I have the bit interleaver, the symbol interleaver, the
BCH encoder for the TP data and the TP data formatter done.

If I have time this weekend I am hoping to get the
2048 and 8192 FFT MMX code done. After the fun I
had with pipe-lining the complex FIR code I wrote I have
decided to stick to using a modified version of an Intel
application note I found, otherwise it would take me forever
to write the FFT code. The MMX code should be about 5X
the speed of a C implementation.

What is left to do is the mapping of the symbols onto the
carriers, the inclusion of the pilot tones and the addition of
a x5 interpolator /4 decimator to get the 8 Msamples/s of the
encoder to 10 Msamples/s so it can then be interpolated up
to 100 MSamples/s as required for the USRP2.

My DVB-T implementation will be secondary to my DVB-S
one so don't hold your breath. It just gives me a break from
writing MPEG2 code which is soooooo boring.

Receiving DVB-T @ 24 cms is going to require some thought.
I will have to do initial tests under suppressed radiation
conditions inside the broadcast band so I can use a domestic
STB to decode the signal.

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